Applications are invited for the Post of Junior Research Fellow (JRF) for the DRDO Funded Project (Sanction Order No. ERIP/ER/ 1503222/ M/01/1729) in School of Electronics Engineering, Vellore Institute of Technology (VIT), Vellore Campus.
A first class M.Tech/M.E. (VLSI/Applied Electronics/Embedded systems) (OR)
B.Tech/B.E.(Electronics Communication Engineering(ECE)/Electrical and Electronics Engineering(EEE)) with GATE qualification.
Desirable (if any):
Good knowledge in Verilog coding,FGPA Implementation and MATLAB coding. Willing to enrollfor PhD Programme at VIT Vellore.
Stipend : Rs.25,000/-(Per month)
Sponsoring Agency : Defence Research and Development Organization (DRDO), New Delhi.
Duration : 2 Years
Principal Investigator : Dr.Thanikaiselvan V, Associate Prof., & HoD, Department of Communication Engineering.
Co-Principal Investigator: Dr. Sivanantham S. Asst. Dean (Academic Research)
Send your resume along with relevant documents pertaining to the details of qualifications, experience and latest passport size photo etc. on or before 30th December 2018 through online http://careers.vit.ac.in
No TA and DA will be paid for appearing the interview.
Shortlisted candidates will be called for an interview at a later date which will be intimated by email. .
Key skills: Image Processing, Cryptography, MATLAB Coding, Verilog coding, FGPA Implementation
Salary: Not Disclosed by Recruiter
Industry:Education / Teaching / Training
Functional Area:Teaching, Education, Training, Counselling
Employment Type:Permanent Job, Full Time
Desired Candidate Profile
UG:B.Tech/B.E. - Electronics/Telecommunication, Instrumentation
PG:M.Tech - Electrical, Electronics/Telecommunication
Vellore Institute of Technology
Contact Company:Vellore Institute of Technology